QuickLogic Announces New Aurora™ FPGA/eFPGA User Tools with Enhancements for Reconfigurable Computing

Built on strong foundation of open-source modules for commercial deployments
Supports additional HDL inferencing and design debug capabilities
New Features improves utilization and performance for reconfigurable computing

SAN JOSE, Calif., Nov. 16, 2023 /PRNewswire/ — QuickLogic Corporation (NASDAQ: QUIK) has released version 2.4 of its Aurora eFPGA development tool suite. This newest version integrates core tool enhancements that improve the eFPGA utilization and performance of designer’s RTL, particularly in the area of reconfigurable computing. The Tool Suite integrates fully open-source modules for scalability, longevity, and full code transparency.

New Features

Asymmetric BlockRAM (BRAM) Inferencing – Reconfigurable computing algorithms, particularly ones that involve cryptography or the real-time update of weights when implementing convolutional neural networks often require different read/write widths of BRAMs. The Inferencing feature now available in Aurora™ reduces the need for manual modification of a user’s RTL design.
State-of-the-Art “Single Stage” Routing – The maximum operating frequency (Fmax) of a user’s design is a function of the efficiency of the Placement and Routing (PnR) algorithms adopted by the FPGA User Tool. Aurora™ version 2.4 integrates a state-of-the-art Single Stage Routing algorithm that boosts Fmax of a user’s design targeting QuickLogic eFPGA cores by up to 24% according to QuickLogic’s extensive suite of benchmark designs. The algorithm was developed through a funded research program at the University of Toronto and presented at the FPL Conference in Sweden in September of this year.
Power Calculation –eFPGA cores have nearly unlimited reprogrammability, therefore, understanding dynamic power consumption across the universe of use cases can be an incredibly time-consuming task. This latest version of the Aurora FPGA Tools calculates dynamic power from a user’s design’s clock frequencies and extracted capacitance models extracted from QuickLogic’s ASIC-like design methodology. Moreover, with QuickLogic’s Continuous Integration (CI) infrastructure, Command Line Interface (CLI) option, and advanced scripting examples, FPGA users can calculate anticipated power consumption across libraries of user designs – in a fully automated way.
Usability – Validating functionality and timing closure can be an arduous task for FPGA users. Version 2.4 of Aurora FPGA User Tools includes several developments to the workflow to improve overall user’s design time. These include:
- Upgraded Integrated Development Environment,
- Project Workspace,
- Execution Control Panel,
- Expanded Log Console,
- Physical Viewer,
- Critical Path Analysis, and
- Detailed Timing/Utilization Information.

“QuickLogic’s commitment to excellence is evident in the release of Aurora version 2.4 eFPGA/FPGA User Tools,” said Mao Wang, senior director of product development at QuickLogic. “The latest version of the tool delivers significant performance and utilization improvements for our customers and empowers them to create more efficient designs.”

Availability

QuickLogic’s new Aurora 2.4 Development Tool Suite is available now. For more information, visit www.quicklogic.com/products/efpga-user-tools-2-4

About QuickLogic

QuickLogic Corporation (NASDAQ: QUIK) is a fabless semiconductor company that develops innovative embedded FPGA (eFPGA) IP, discrete FPGAs, and FPGA SoCs for a variety of industrial, aerospace and defense, edge and endpoint AI, consumer, and computing applications. Our wholly-owned subsidiary, SensiML Corporation, completes the end-to-end solution portfolio with AI / ML software that accelerates AI at the edge/endpoint. For more information, visit quicklogic.com.

The QuickLogic logo and QuickLogic are registered trademarks of QuickLogic Corporation. Aurora is a trademark. All other brands or trademarks are the property of their respective holders and should be treated as such.